The present invention relates generally to the alignment and positioning of mall features during fabrication of integrated circuit devices, including the alignment of code programming features in non-volatile memory devices.
Alignment and selectivity are important factors that affect production yields during the processes used in the manufacture of integrated devices having relatively small dimensions. By way of example, a number of integrated circuit based non-volatile memory devices require ion implantation to program selected code into selected memory cells during fabrication. One type of non-volatile memory device is a mask-programming read-only-memory (ROM) device. A mask programmable ROM is a non-volatile memory device that retains data even if power is removed from the device. One example of a ROM implementation using flat cell design is disclosed in U.S. Pat. No. 5,117,389 entitled "Flat-Cell Read-Only-Memory Integrated Circuit" by Yiu, which is incorporated by reference.
One typical ROM array architecture utilizes a plurality of metal-oxide-semiconductor (MOS) transistors, or memory cells, that are arranged in an array. The cells in the array are coupled using bitlines and wordlines. If a voltage applied to the gate of a particular memory cell is lower than a threshold voltage, the memory cell is not turned on (i.e. electric current will not flow between the source and the drain). On the other hand, if the voltage applied to the gate of the memory cell is higher then the threshold, the memory cell is turned on. Accordingly, the cell can be programmed by implanting selected memory cells in order to define the threshold voltage of the cell. For smaller integrated circuit devices, errors may occur in the ion implantation step due to variations in the critical dimensions of the code programming mask as well as possible misalignment of the mask.
An improved process for fabricating a flat cell mask programmable ROM device that utilizes alignment structures to reduce the risk of errors due to mask misalignment is described in the U.S. Pat. No. 5,691,216 entitled "Integrated Circuit Self-Aligning Process and Apparatus" by Yen et al., which is incorporated by reference. As described therein, alignment structures may offer certain advantages in improving alignment and selectivity. Referring initially to FIGS. 1 and 2, a flat cell mask programmable ROM device that is ready for code programming via ion implantation in accordance with the process described in the '216 patent will be briefly described. As best seen in FIG. 1, a ROM array is provided that has a plurality of wordlines 102 that are arranged orthogonally relative to a plurality of bitlines 104. The wordlines 102 are isolated by ion barriers 202 that, as best seen in the cross sectional view of FIG. 2, usually have heights that are greater then the heights of the wordlines 102. The ion barriers 202 effectively act as alignment structures that compensate for misalignments in the masking layer used during code programming of the mask ROM array. The ion barriers also help provide uniform channel widths along similar coded regions and provide additional contact and support surface area for the code programming mask.
FIG. 3 illustrates a side cross-sectional view of the mask ROM array of FIG. 1 after the code programming mask 302 has been deposited and portions of it removed in preparation for code programming. The ion barriers 202 and the wordlines 102 are positioned over a gate oxide layer 300. The ion barriers are typically made of silicon nitride or silicon dioxide and are positioned between the plurality of wordlines. Since the ion barriers have a height that is greater than the height of the wordlines, an uneven tooth-like topography results. Although this described structure works well, the tooth-like topography sometimes makes it difficult to remove the unwanted portions of the code programming mask 302 in preparation for ion implantation.
More specifically, the code programming mask 302, may typically include, a bottom anti-reflective coating (BARC) layer 304 underlying a photoresist layer 306. BARC layer 304 is placed over the uneven surface defined by the top surfaces of wordlines 102 and alignment structures 202. Photoresist layer 306 is then deposited over BARC layer 304. When the portions of code programming mask 302 is removed to expose some designated portions of the wordlines for code programming, some BARC material, or in the worst cases, photoresist, may be left behind in the trenches 308 that are defined by the top surfaces of the wordlines and part of the side walls of the alignment structures where the height of the alignment structures surpass those of the wordlines. The BARC material and/or photoresist residue left behind on the wordline surfaces may block the ion implants, which in turn may result in errors in the code programming process.
In view of the foregoing, improved methods and apparatuses for forming integrated circuit devices with alignment structures that promote self-alignment during ion implantation would be desirable.